Register File with low power retention mode and 3 speed options
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16-bit 2-channel 312.5kSPS delta-sigma ADC
028TSMC_ADC_02 is analog ADC based on 4th-order sigma-delta modulator with fully differential/single-ended signal processing. Second order discrete time Sigma-Delta stage includes two discrete time integrators, which are implemented using switch-capacitor (SC) technique, SC summing stage and 3-level quantizer.
ADC allows to obtain 92dB SNR at bandwidth 150kHz.
ADC allows to obtain 92dB SNR at bandwidth 150kHz.
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