15b 4kS/s cyclic/algorithmic serial ADC (Analog/ Digital Converter)

特色

• Effective Number of Bits: 15b (SNDR=92dB signal-to-noise-and-distortion-ratio) with digital IIR filter post-processing
• Power supply 3.3V, Power Consumption 200µW
• 0.35um CMOS Technology
• Low input sampling capacitor of 4pF
• Pseudo differential analog voltage input (3 pins: Vin+, Vin- with adjustable common mode level Vcm)
• Layout chip area < 0,8mm²

Block Diagram of the 15b 4kS/s cyclic/algorithmic serial ADC (Analog/ Digital Converter)