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12 Bits, 100 kS/s SAR Analog to Digital Converter
CT22407 implements voltage monitor operation.
The core of the IP is a 12-bit Capacitive Charge-Redistribution SAR ADC converting the analog measurement into the digital domain.
Its reference voltage VREF is generated internally, buffering an internally generated bandgap voltage.
Due to the fully-differential architecture of the analog front end, measuring voltage requires a single ended to fully differential conversion through included switched cap amplifier that acts also as a sample and hold and performs the required gain adjustment to properly condition the signal for the SAR ADC Core.
Due to the high accuracy requirements, accurate single temperature trimming of the internal reference voltage has to be performed.
Input voltage range is assumed to be 0÷1.8V.
Programmable measurement averaging can be performed and therefore output can be set as the result of a single conversion or the average of 2/4/8 conversions.
The core of the IP is a 12-bit Capacitive Charge-Redistribution SAR ADC converting the analog measurement into the digital domain.
Its reference voltage VREF is generated internally, buffering an internally generated bandgap voltage.
Due to the fully-differential architecture of the analog front end, measuring voltage requires a single ended to fully differential conversion through included switched cap amplifier that acts also as a sample and hold and performs the required gain adjustment to properly condition the signal for the SAR ADC Core.
Due to the high accuracy requirements, accurate single temperature trimming of the internal reference voltage has to be performed.
Input voltage range is assumed to be 0÷1.8V.
Programmable measurement averaging can be performed and therefore output can be set as the result of a single conversion or the average of 2/4/8 conversions.
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Block Diagram of the 12 Bits, 100 kS/s SAR Analog to Digital Converter
SAR; ULP; Low; Power; ADC; IP
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