12 Bit Low Power AD Converter

The IP is a 12bit fully differential successive approximation analog-to-digital converter. With a clock frequency of 5MHz a sampling rate of 200kS/s is achieved. The design is implemented using the XFAB 0.18µm process XC018. In order to keep the implementation as general as possible, special process options, such as isolated NCH devices, are not used. A successive approximation register controls the ADC. The converter works down to 2V with a current consumption of less than 400µA. The ADC can be switched to low power mode resulting in maximum current consumption of 200µA at a sampling rate of 62.5kS/s (@fCLK=1.5MHz).

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