The S3DAIQ640M12BS28 employs a current steering architecture with differential current outputs. It uses 6 linear bits
and 6 binary bits, all of which are generated from within the current source array.
This segmentation results in an excellent static performance and reduced glitch energy at the output. This also ensures parasitics within the DAC are minimized. Furthermore, the distortion at the output is greatly reduced by using propriety latch architecture and randomization of the output current sources.
The combination of static performance, reduced glitch energy, minimized parasitics and reduced distortion, results in outstanding dynamic performance over a wide range of conditions including frequencies close to the DAC Nyquist
This 12-bit Dual DAC features an excellent static performance that includes ±0.8LSB DNL and ±1.5LSB INL for typical
Dynamic performance highlights considering a signal frequency of 26MHz and 640MS/s conversion rate include an SNR
> 68dB and an SFDR > 64dBc.
The S3DAIQ640M12BS28 is designed in a 28nm logic process, which is ideal for integration with a DSP engine, and can be cost-effectively ported across foundries and process nodes upon request.