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12-bit, 50 MSPS Analog-to-Digital Converter IP block
The A12B50M is an ultra low-power, pipeline analog to digital converter (ADC) intellectual property (IP) design block. It has 12-bit resolution and a sampling rate of up to 50 megasamples per second (MSPS).
The A12B50M maintains its high-performance while consuming an exceptionally low power of only 11.8 mW, making it an outstanding solution for high efficiency designs and applications.
The cost-effective IP block has been designed and verified in a 180 nm CMOS process.
Available as IP and Integrated Circuit.
The A12B50M maintains its high-performance while consuming an exceptionally low power of only 11.8 mW, making it an outstanding solution for high efficiency designs and applications.
The cost-effective IP block has been designed and verified in a 180 nm CMOS process.
Available as IP and Integrated Circuit.
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