MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
12-bit 50/100MSPS SAR A/D Converter in 55nm LL
This release is in 55nm 3.3V/1.2V CMOS logic process suitable for 1P6M and 1P7M metal options.
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