12Bit，122.88M采样率，八核ADC，应用于LTE/DVB/家庭网络。

特色

• Samsung 28nm LPP Process
• 1.0V Core & 1.8V I/O Supplies
• 12-bit High-Speed SAR ADC
• 4 I/Q-pair ADC Channels: Total 8 ADC Cores
• 122.88MS/s Sampling Rate per ADC Core
• Internal Bandgap and Biasing System Included
• All required Voltage References Included
• No External Accurate Reference required
• No External Reference Decoupling required
• Good Power-Supply Noise Rejection
• Differential Input Signal Range: 1.0Vppdiff
• Outstanding Dynamic Performance:
• 76.0dB SFDR at fin=20MHz
• -75.0dB THD at fin=20MHz
• 63.5dB SNR at fin=20MHz
• 63.1dB SNDR at fin=20MHz
• 10.2-bit ENOB at fin=20MHz
• [Noise integrated up-to Nyquist]
• Outstanding I/Q Cross-Channel Performance:
• 0.1dB I/Q Channels Gain Mismatch
• -75.0dB Crosstalk between I/Q Channels
• Ultra Low Power Dissipation: Only 45mW
• 8 Cores Converting Simultaneously
• Including References Buffers for 8 ADCs
• Ultra Compact Die Area: Only 0.3mm2

优势

• It features an excellent dynamic performance including -75.0dB THD and 10.2-bit ENOB, while dissipating a mere 45mW for the complete 8 ADC Cores. The S3ADS4IQ122M12BSS28LPP can be cost-effectively ported across foundries and process nodes upon request.

可交付内容

• Datasheet
• Characterization Report
• Flat Netlist (cdl)
• Layout View (gds2)
• Abstract View (lef)
• Timing View (lib)
• Behavioral Model (Verilog)
• Integration Support

应用

• Connected Consumer Devices
• LTE
• DVB
• Home Network
• Wireless & Wireline Communications Infrastructure
• Wireline Communications
• Imaging

Block Diagram of the 12Bit，122.88M采样率，八核ADC，应用于LTE/DVB/家庭网络。

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