The CS_AD120120D_TSMC40LP is an ultra low-power dual (I/Q), 12-bit, 120-MSPS ADC using an innovative successive approximation register (SAR) architecture. Extremely low power and compact layout make for an easy to use building block. Easily scaled for single or massively parallel configurations.
特色
- Differential analog input
- (Optional) Continuous-time input buffer
- Built-in reference buffer
- No external bypassing needed
优势
- Ultra Low Power
- Small area
- Low Noise
- Highly linear dynamic performance
可交付内容
- GDS
- CDL
- LEF
- LIB
- Behavioral model
- User guide
应用
- GPS
- Embedded Sensors
- IoT
- Wireless Radios
- Connected Home
Block Diagram of the 12-bit 120-MSPS IQ SAR ADC