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12-Bit 1 MS/s DAC with voltage output
The IP consists of a 12 bit current steering DAC. The DAC is connected to a transimpedance amplifier(TIA) in order to provide a voltage output signal. The amplifier can be adapted for different applications to optimize for performance, power consumption or output load of the IP.
The digital input data is saved to an internal register and provided immediately to the output.
The IP uses a single current reference input. A matching current reference cell can be provided. 7 bit gain and offset trimming is included to adapt for process variations.
The DAC is silicon proven using the AMS C18 process. Measurement results are available from evaluation and volume production. One application of the IP is an industrial sensor ASIC for safety critical applications.
Fraunhofer IIS provides a detailed documentation and support for the IP integration.
Modifications, extensions and technology ports of the IP are available on request.
The digital input data is saved to an internal register and provided immediately to the output.
The IP uses a single current reference input. A matching current reference cell can be provided. 7 bit gain and offset trimming is included to adapt for process variations.
The DAC is silicon proven using the AMS C18 process. Measurement results are available from evaluation and volume production. One application of the IP is an industrial sensor ASIC for safety critical applications.
Fraunhofer IIS provides a detailed documentation and support for the IP integration.
Modifications, extensions and technology ports of the IP are available on request.
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Block Diagram of the 12-Bit 1 MS/s DAC with voltage output
