MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
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12-bit 1-channel 1 to 10 kSPS SAR ADC
130iHP_ADC_01 employs high-performance successive approximation architecture. The ADC operates with sampling rate from 1 to 10 kSPS and input clock from 14 to 140 kHz. The block has differential input and can operate in two modes: single measurement or continuous measurement. The ADC supports standby mode and features low power consumption, compact area.
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