100MHz Low Jitter PLL

The ll_pll1421s01_ln14lpp_34201 is a 1.8V/0.8V dual supply-voltage phase locked loop (PLL) with a wide-output-frequency-range for frequency synthesis. It consists of a phase frequency detector (PFD), a charge pump, a voltage-controlled oscillator (VCO), a 6-bit predivider, a 10-bit main-divider, a 3-bit scaler, and an automatic frequency control (AFC).

• 查看 100MHz Low Jitter PLL 完整数据手册
• 联系 100MHz Low Jitter PLL 供应商