Multi Protocol Endpoint IP Core for Safe and Secure Ethernet Network
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100MHz to 1200MHz Fractional-N Phase-Locked Loop
055TSMC_PLL_08 is a frequency synthesizer with a fractional division ratio and a quadrature output of the heterodyne signal intended for formation, stabilization and frequency modulation (in transmission mode) of the heterodyne signal in the two frequency ranges: 100-150MHz, 200-300MHz, 400-600MHz and 800-1200MHz, as well as for the formation of clock frequency signals from 1.74 to 52MHz. The block is designed to use a 52MHz signal from XTAL or TCXO as a reference frequency.
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