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10-bit SAR ADC TSMC
The agileADC GP analog-to-digital converter is a configurable general-purpose ADC that uses a traditional Charge-Redistribution SAR architecture referenced to VDD, VSS. The architecture is capable of achieving up to 10-bit resolution. It includes an eight-channel input multiplexor and provides input buffers that may be bypassed for full rail-to-rail capability.
The agileADC GP analog-to-digital converter can be tuned to your specifications and is ideally suited for signal conversion and monitoring in applications such as in IoT, Security, Automotive, AI and general SoCs and ASICs.
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options.
The agileADC GP analog-to-digital converter can be tuned to your specifications and is ideally suited for signal conversion and monitoring in applications such as in IoT, Security, Automotive, AI and general SoCs and ASICs.
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options.
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Block Diagram of the 10-bit SAR ADC TSMC
