GNSS (GPS, Galileo, GLONASS, Beidou3, QZSS, SBAS) Ultra-low power RF Receiver IP
You are here:
10-bit, 50 MSPS Analog-to-Digital Converter IP block
The A10B50M is an ultra low-power analog to digital converter (ADC) intellectual property (IP) design block. It has 10-bit resolution and a sampling rate of up to 50 megasamples per second (MSPS).
The A10B50M maintains its high-performance while consuming an exceptionally low power of only 8 mW, making it an outstanding solution for high efficiency designs and applications.
The cost-effective IP block has been designed and verified for FDSOI processes and validated at 180 nm process.
Available as IP and Integrated Circuit.
The A10B50M maintains its high-performance while consuming an exceptionally low power of only 8 mW, making it an outstanding solution for high efficiency designs and applications.
The cost-effective IP block has been designed and verified for FDSOI processes and validated at 180 nm process.
Available as IP and Integrated Circuit.
查看 10-bit, 50 MSPS Analog-to-Digital Converter IP block 详细介绍：
- 查看 10-bit, 50 MSPS Analog-to-Digital Converter IP block 完整数据手册
- 联系 10-bit, 50 MSPS Analog-to-Digital Converter IP block 供应商