Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
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10-bit 1-channel 100 MHz current DAC
The 10-bit dual high-speed DAC is based on current steering architecture, which provides high-speed conversion rate and good dynamic performance. DAC consists of three principal blocks: adjustable reference voltage and current generator, decoding logic, current source and output switches array. Device has a feature of adjusting output current and entering sleep mode, turning the device off. DAC requires 1.8 V analog and digital supply, and digital and analog ground to work properly. Pins dac[2:0] adjust DAC output current.
The device is implemented on technology SMIC EEPROM CMOS 0.18 um.
The device is implemented on technology SMIC EEPROM CMOS 0.18 um.
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