DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Descriptor List
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10/100/1000 Ethernet (Triple Speed)
As the leading provider of 1 Gbps Ethernet (GbE) for FPGA and HardCopy® ASIC devices, Altera offers the Triple-Speed Ethernet MegaCore® function, allowing you to easily build systems with a 10/100/1000 Mbps Ethernet network connection. Altera's Triple-Speed Ethernet consists of a 10/100/1000 Mbps Ethernet media access control (MAC) and physical coding sublayer (PCS) intellectual property (IP). This IP function enables Altera® FPGAs to interface to an external Ethernet PHY device, which, in turn, interfaces to the Ethernet network.
The Triple-Speed Ethernet's external Ethernet serial interfaces (SGMII and 1000Base-X) are available in all Altera FPGAs and HardCopy ASICs with serial transceivers. You can also find these interfaces in Altera devices with LVDS I/Os with dynamic phase alignment (DPA) that can operate up to 1.25 Gbps. The LVDS I/Os enable very scalable multi-port GbE system designs while leaving serial transceivers for higher performance protocols. The parallel interfaces are also available in Cyclone®, Arria® GX, and Stratix® FPGA families and HardCopy ASIC families.
The Triple-Speed Ethernet's external Ethernet serial interfaces (SGMII and 1000Base-X) are available in all Altera FPGAs and HardCopy ASICs with serial transceivers. You can also find these interfaces in Altera devices with LVDS I/Os with dynamic phase alignment (DPA) that can operate up to 1.25 Gbps. The LVDS I/Os enable very scalable multi-port GbE system designs while leaving serial transceivers for higher performance protocols. The parallel interfaces are also available in Cyclone®, Arria® GX, and Stratix® FPGA families and HardCopy ASIC families.
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