LVDS_RX is LVDS receiver with rail to rail input range. The interface to the core logic includes the output signal pins (OUTp, OUTn) to receive data and the control pins (EN_RX) to configure the state of the receiver. The VREF12 is input voltage reference. Pin IREF_RX is used to get current reference from receiver bias. PAD_INp and PAD_INn are complementary inputs to connect to the bonding pads. This LVDS receiver does not employ hysteresis, and therefore does not comply with the hysteresis requirement of the TIA and IEEE standards for LVDS differential signaling at the specified rates.