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1.2 GHz Integer PLL (71100)
This is a dual supply voltage integer Phase Locked Loop (PLL). It generates an output clock which is determined by a 6-bit pre-divider, 10-bit main-divider and 3-bit scaler. The input clock bypass mode, lock detection and glitch-free function are available.
特色
- 14nm Low Power CMOS device technology
- 1.8V, 0.9V to 0.8V dual power supply
- Operation junction temperature: -40 to 125°C
- Input frequency range: 2MHz to 300MHz
- Output frequency range: 18.8MHz to 1.2GHz
- Period Jitter: ±1.5% of VCO clock period
- Output clock duty ratio: 47 to 53%
- Glitch-free scaler / Lock detector/ Input bypass mode (FOUT=FIN)
可交付内容
- Data Sheet
- User Guide
- Verilog model
- Timing LIB
- CDL netlist
- Layout (GDSII or OAS)
应用
- Mobile/Consumer/IoT
Block Diagram of the 1.2 GHz Integer PLL (71100)
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