YorChip推出适用于边缘 AI 的低延迟 200G 芯片

YorChip Chiplet supports both Advanced and Standard UCIe packaging options and features 4 x 56G Long Reach PHY for a total bandwidth of 200Gbps.

SAN RAMON, CA, USA, June 19, 2024 -- YorChip, Inc. announces its first Chiplet details to empower edge AI developers. The Chiplet supports both Advanced and Standard UCIe packaging options and features 4 x 56G Long Reach PHY for a total bandwidth of 200Gbps. The Chiplets features low latency of sub 60nS for 100G traffic with ability to do port to port switching in under 150nS. It is designed for 12nm node and targeting latency sensitive markets such as industrial, aerospace, networking and financial markets.

Chiplets represent multi-billion-dollar market potential – according to Transparency Market Research, the Chiplet market is expected to reach more than US$47 Billion by 2031, representing one of the fastest growing segments of the semiconductor industry at more than 40% CAGR from 2021 to 2031. This growth is expected to be enabled by the considerable cost reduction and improved yields Chiplets will enable as compared to traditional system-on-chip (SoC) designs. Source: https://www.transparencymarketresearch.com/chiplets-market.html

YorChips’ CEO and founder, Kash Johal, said, “Latency is critical for machine-to-machine communications and this Chiplet delivers the lowest cost and latency in the market. We are pleased to announce Etopus is our partner for the 56G PHY, which is already in silicon production at major networking clients. For the ultra-low latency MAC/PCS/Switching IP we are working with a Silicon Valley startup SiliconIPs.com who offer best in class power and latency.”

“We are pleased to support YorChip’s ultra-low latency 200G Ethernet Chiplet,” said Harry Chan, Founder and CEO of Etopus. “Our 56G SerDes PHY has shipped in high volume in Tier-One Networking Application Specific Standard Products (ASSPs). It is exciting to work with YorChip to jointly enable Ultra-Low Latency 200G Ethernet Chiplets at scale for emerging and high-volume AI/ML workloads”.

“Low latency Chiplet connectivity is critical for AI/ML workloads for our customers in Industrial, Enterprise, and Aerospace and Defense Segments,” said Brian Faith, CEO of QuickLogic. “We believe this Chiplet will interoperate with future Chiplets in our ecosystem that leveraging QuickLogic eFPGA Hard IP, and we are excited to see this development for Edge AI and other markets that demand real-time use cases.”

Join us at DAC 24 to learn about YorChip’s Chiplets. @ QuickLogic booth # 2358

Availability

Chiplets supporting BOTH UCIe-A and UCIe-S will be available in 2025

About YorChip

Silicon Valley start-up focused on Chiplets for Mass Markets. We are leveraging proven partner IP and our novel die-to-die technology to deliver off-the-shelf, low cost, secure chiplets at scale. We are developing a complete ecosystem of off the shelf Chiplets. www.yorchip.com