Alma Technologies 宣布其超高吞吐量图像缩放器 IP 内核即可投入使用

ATHENS, Greece -- August 03, 2022 -- Alma Technologies S.A. today announced its new UHT-SCALER IP core, a standalone and high-performance image scaler, designed for enabling ultra-high frame rate SD, HD or Ultra HD (4K/8K and beyond) image resizing, even in low-end ASIC or FPGA silicon.

The UHT-SCALER core is a video processing block used to resize (scale) input color images of one size to output color images of a different size. Output image can be smaller or larger than the original image, depending on the programmed scaling ratio. The core supports scaling of 4:4:4, 4:2:2, 4:2:0 and 4:0:0 (grayscale) video streams, in 8 up to 16 bits sample depth and provides excellent visual results by using bilinear, bicubic, lanczos or expfilter scaling algorithms. The implementation is a fully accelerated, standalone and robust solution in a single IP instance, saving on ASIC or FPGA silicon area and power. The core does not need an external memory device for its implementation.

The new Alma Technologies UHT-SCALER IP is very easy-to-use and integrate in a system. It is self-contained, CPU-less, complete H/W implementation and is available either in RTL source code, or as pre-synthesized Netlist for all major FPGA vendor devices.

About Alma Technologies

Alma Technologies is a semiconductor IP provider, designing high-quality FPGA and ASIC IP cores since 2001. Its products stand out for their engineering, being complete, easy-to-use and reliable IP solutions. World-class technical support and a long track record of proven designs by more than 250 licensees in over 20 countries provide Alma Technologies customers with excellent service and great value.

Available either as self-contained and implementation technology independent VHDL or Verilog RTL, or as optimized Netlists for AMD-Xilinx, Efinix, Intel, Lattice and Microsemi FPGA and SoC devices, Alma Technologies IP ensures a fast and trouble-free integration in any FPGA or ASIC design.
Learn more at www.alma-technologies.com.