March 17, 2022 -- The Fraunhofer Institute for Photonic Microsystems IPMS offers ready-made, platform-independent IP core modules. With IP modules, developers can quickly adopt complete functional areas in standard products such as SoCs, microcontrollers, FPGAs and ASICs. This allows a significant reduction of development times and costs. With EMSA5, Fraunhofer IPMS offers a processor core based on the open RISC-V instruction set architecture. In the latest release, the institute has ported Tensorflow lite to the EMSA5 RISC-V. Thus, the EMSA5 RISC-V processor core is now ready for use in Edge AI applications, for example sensor data evaluation, gesture control or vibration analysis.
"Edge AI means that AI algorithms are executed either directly on the device or on a server close to the device. This is done using the data collected directly from the device - without the need to connect to the Internet or a cloud service. Only the results of the processing are then fed into the cloud. In this way, the devices can make autonomous decisions within milliseconds using AI," explains Dr. Andreas Weder, group manager Module Integration at Fraunhofer IPMS. To be able to process the data, so-called machine learning models are used. Such a model is trained on the basis of data sets to recognize patterns - first on the training data set and later with real data, for example from sensors. In this way, it can derive new facts from already existing data and apply them to a specific context to make predictions.
"Applications with low-latency requirements can benefit from this type of processing, as there are no delays caused by transmitting data to the cloud. The system is able to work even with unstable internet connections and does not rely on processing data in the cloud - a big advantage for mobile or stand-alone applications and for locations with unstable data connections," Weder said. As the number of IoT devices increases enormously worldwide and more and more data is sent to the cloud, the scalability of the system also plays a major role. Furthermore, data security is of course of high interest nowadays. The more data that has to be sent wirelessly to the cloud, the more points of attack an IoT system provides. The use of an edge system makes it more difficult to attack from the outside because the data is processed locally in a closed network.
"We have ported Tensorflow lite to the EMSA5 RISC-V. Our users can now easily implement edge AI applications such as sensor data analysis, gesture recognition or vibration analysis," explains Weder. The Fraunhofer IPMS EMSA5 processor core can be made available for any FPGA platform. Integration into customer-specific ASICs for any foundry technologies is also possible.
Developers using the EMSA5 processor core can use open-source RISC-V development environments (IDE), test tools, and libraries, including the GNU toolchain and the comprehensive Eclipse IDE with OpenOCD debug support. Fraunhofer IPMS also works with commercial third-party compilers and software tools such as IAR Embedded Workbench to enable software development in the Functional Safety context.
About Fraunhofer IPMS
The Fraunhofer Institute for Photonic Microsystems IPMS stands for applied research and development in the fields of industrial manufacturing, medical technology and improved quality of life. Our research focuses on miniaturized sensors and actuators, integrated circuits, wireless and wired data communication, and customized MEMS systems.
Fraunhofer IPMS has years of experience in designing and engineering IP cores for automotive communication and has a family of TSN IP cores. Many users worldwide use Fraunhofer IPMS IP cores in the automotive, aerospace, and automation industries, among others. The multidisciplinary IP design team of Fraunhofer IPMS with expertise in computer architectures, network structures, RTL design and implementation of electronic systems is also available as a competent development partner for application-specific adaptations of the IP cores as well as their integration into complex network architectures.