MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
Tiempo Secure宣布在格芯22 FDX和TSMC 16 FFC工艺制程上提供Secure Element IP内核
February 10, 2020 -- Tiempo Secure announces the availability of TESIC - its Secure Element IP core – for customer designs on GF 22 FDX and TSMC 16 FFC.
TESIC is a CC EAL5+ PP0084 certification-ready secure element IP that is delivered as hard macro for plug-and-play System-on Chip (SoC) integration. Datasheet can be downloaded from TESIC product page.
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