By Lauro Rizzatti
January 14, 2019
VSORA, a startup from Paris, recently emerged from stealth mode with a new approach to accelerate 5G broadband design. Khaled Maalej, its founder and CEO, and I recently talked about VSORA’s multicore digital signal processing (DSP) intellectual property (IP) and development flow for 5G and AI applications.
Serial entrepreneur Maalej and VSORA’s founders come from DiBcom, a Parisian startup (now part of Parrot) that designed chipsets for low-power mobile TV and radio reception. Over several years at DiBcom, they noticed that the development of high-bandwidth baseband systems was not evolving and improving. They determined that this was due to the inadequacy of the heavily sequential development flow that forced a time-consuming feedback loop between algorithmic designers and DSP hardware developers.
As Maalej continued, he explained that algorithmic engineers would devise an algorithm in the MATLAB environment. Once they trusted that their creation provided satisfactory results, they would freeze the algorithm and pass it over to the DSP developers for implementation. That group would spend a couple of months implementing a thoroughly verified register transfer level (RTL) design of the algorithm.