28G LR Multi-Protocol SerDes (MPS) PHY - GLOBALFOUNDRIES 12nm
Avery Design Systems专注于超高清显示VIP产品系列
TEWKSBURY, MA., February 27, 2017 – Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability its expanded Display VIP portfolio including support for HDMI 2.0b, DisplayPort 1.4, Embedded DisplayPort (eDP) 1.4b, DSI-2, and DSC 1.2.
Today’s display technologies support an array of advanced consumer electronics, personal computers, automotive infotainment, and mobile devices with spectacular video and audio capabilities including the latest in 3D and 8K/10K HD video, content protection, HD audio, compression, and device control. Avery Display VIP portfolio enables designers to verify their designs conform to the vast array of display resolution and audio channel parameter sets and testing integrated video, audio, control, dynamic reconfiguration, compression, and low power modes of operation.
The Avery Display VIP portfolio supports
- Verification of both transmitter/source and receiver/sink and PHY designs
- Automated dynamic Video and Audio traffic generation and PHY bit rate clock generation delivering fully accurate frame synchronization timing of multiple video and audio sources based on various shaping parameters including random receiver/sink device peripheral parameter set, interleaved/multiple packet control, interleaved frames control, line and frame blanking intervals
- Standard DSC extensions using VESA C model encoder/decoder
- Comprehensive protocol checking and coverage report
- Functional traffic, error, and operational and power modes coverage
- Protocol analyzer tracker reporting at all layers
- Error injection and scoreboarding supported through common callback for layer-specific inspection and error injection using methods to in-line modify, drop, inject packet ahead/behind, force next state
- Conformance testsuites including Standards-based and Avery custom tests
- Verified with multiple IP vendor partners including SLI, Arasan, LnT, Mixel
- Native SystemVerilog/UVM implementation
About Avery Design Systems
Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for RT-level and gate-level X verification; robust core-through-chip-level Verification IP for PCI Express, USB, AMBA, UFS, Unipro, CSI-2/DSI-2, Soundwire, Sensewire, DDR/LPDDR, HBM, HMC, ONFI/Toggle, NVM Express, SAS, SATA, eMMC, SD/SDIO, CAN FD, LIN, FlexRay, HDMI, and DisplayPort standards. The company is a member of the Mentor Graphics Value Added Partnership (VAP) program and has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at www.avery-design.com.
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