Imperas和T＆VS合作更新嵌入式系统的软件验证和验证方法

Extending Best Practices for Embedded Software Development, Debug and Test via Virtual Platforms and Expertise

November 2, 2016, OXFORD, United Kingdom – Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, and Test and Verification Solutions (T&VS), a leading hardware verification and software testing provider, today announced that they have partnered to promote state-of-the-art software verification and validation (SW V&V) methodologies for embedded systems.

Imperas offers virtual platform (software simulation) based tools and solutions for early software development and more comprehensive software testing. In addition to SW V&V, use cases include porting and bring up of hypervisors and operating systems, advanced software analysis such as non-intrusive code coverage, profiling and memory monitoring, and support for advanced methodologies such as Continuous Integration (CI) and fault injection. Imperas offers a wide variety of processor models and systems architectures from a range of IP and chip vendors through Open Virtual Platforms (OVP) models and platforms.

T&VS offers hardware verification methodology experience, and embedded software expertise. T&VS provides specialist test and verification services and products to the worldwide semiconductor and embedded systems industries, delivering advanced solutions in test and verification methodologies and tools.

T&VS will provide services to the embedded systems community to help them adopt virtual platform tools and methodologies for software development, debug and test.

Simon Davidmann, CEO of Imperas, commented, “Imperas is excited to partner with T&VS to extend the adoption of virtual platform methodologies and best practices in the arena of test and verification. Collaborating with T&VS, which is bringing their vast hardware verification experience to bear on the problem of SW V&V, will result in significant gains for the entire embedded software community.”

Mike Bartley. Founder & CEO of T&VS, said, “With software now a key deliverable in semiconductor products, our customers increasingly need to develop hardware and software in parallel to hit ever-decreasing market windows, and virtual platforms are a key technique in achieving that. Our partnership with Imperas thus allows T&VS to enhance the solutions we can offer to the market. I am particularly excited by the Imperas fault injection capability which is a key verification technique in the growing safety markets such as automotive.”

Virtual platform based methodology is complementary to hardware based flows, incorporating techniques such as code coverage and fault injection, which are required by automotive software developers, in compliance with ISO 26262. The Imperas tools are non-intrusive, providing necessary visibility, controllability and repeatability.

About T&VS

T&VS (Test and Verification Solutions Ltd) provides services and products to organisations developing complex products in the microelectronics and embedded systems industries. Such organisations use T&VS to verify their hardware and software products, employ industry best practice and manage peaks in development and testing programmes. T&VS’ embedded software testing services includes onsite/offshore testing support including assistance with safety certification and security testing. T&VS hardware verification services include onsite/offshore verification support and training in advanced verification methodologies. T&VS also offers Verification IPs and its own Verification (EDA) signoff tool.

About Imperas

For more information about Imperas, please see www.imperas.com.