UCIe-S PHY for Standard Package (x16) in Samsung (SF5A, SF4X, SF2)
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DDR4 PHY, TSMC T16/T12
The DDR4 PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected with a third-party DFI-compliant DDR4 memory controller. Depending on the loading of package and PCB, the DDR4 can be operated up to 3,200Mbps.
Optimized for low power, low latency, high performance and small area, the InPsytech DDR4 PHY is provided as a hard macro PHY that is primarily delivered as GDSII. Supporting the PHY macro is the RTL based Calibration Accessories for PHY (CAP) for control features such as trainings, read/write leveling, skew controls, PVT compensation and supports for manufacture testing; the CAP also includes an MCU to execute hardware assisted, firmware-based training algorithms.
For further information please contact InPsytech sales representative (sales@inpsytech.com) for details.
Optimized for low power, low latency, high performance and small area, the InPsytech DDR4 PHY is provided as a hard macro PHY that is primarily delivered as GDSII. Supporting the PHY macro is the RTL based Calibration Accessories for PHY (CAP) for control features such as trainings, read/write leveling, skew controls, PVT compensation and supports for manufacture testing; the CAP also includes an MCU to execute hardware assisted, firmware-based training algorithms.
For further information please contact InPsytech sales representative (sales@inpsytech.com) for details.
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Block Diagram of the DDR4 PHY, TSMC T16/T12
