MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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32x8 Bits OTP (One-Time Programmable) IP, TSMC 0.18μm Mixed-Signal 1.8V/3.3V Process
The ATO00032X8TS180GS33NA is organized as 32x8 one-time programmable (OTP) in 8-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in TSMC 0.18μm 1.8V/3.3V Mixed-Signal, General Purpose process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming, configuration setting, feature selection, and PROM, etc.
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OTP IP
- 512x8 Bits OTP (One-Time Programmable) IP, TSMC 12FFC 0.8V/1.8V Process
- NVM OTP in Fujitsu (90nm, 65nm, 55nm, 40nm)
- NVM OTP in Dongbu (180nm, 150nm, 110nm)
- NVM OTP in SMIC (110nm, 65nm, 55nm, 40nm)
- NVM OTP in TSMC (180nm, 152nm, 130nm, 110nm, 90nm, 65nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N4P)
- NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)