MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
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128x8 Bits OTP (One-Time Programmable) IP, TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose
The ATO00128X8TS055ULP3NA is organized as 128x8 one-time programmable (OTP) in 8-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming,
configuration setting, feature selection, and PROM, etc.
configuration setting, feature selection, and PROM, etc.
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OTP IP
- 512x8 Bits OTP (One-Time Programmable) IP, 12FFC 0.8V/1.8V
- NVM OTP in Fujitsu (90nm, 65nm, 55nm, 40nm)
- NVM OTP in Dongbu (180nm, 150nm, 110nm)
- NVM OTP in SMIC (110nm, 65nm, 55nm, 40nm)
- NVM OTP in TSMC (180nm, 152nm, 130nm, 110nm, 90nm, 65nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N4P)
- 4Kx8 Bits OTP (One-Time Programmable) IP, 22nm FDX 0.8V/1.8V