USB3.2 Gen2 Single Lane Re-Timer IP Core
查看 USB3.2 Gen2 Single Lane Re-Timer IP Core 详细介绍:
- 查看 USB3.2 Gen2 Single Lane Re-Timer IP Core 完整数据手册
- 联系 USB3.2 Gen2 Single Lane Re-Timer IP Core 供应商
USB3.2 Gen2 IP
- USB3.2 Gen2 Device Controller IP Core
- USB 3.2 PHY IP ((20G/10G),Silicon proven in UMC 28HPC+)
- USB3.0 DR-OTG Controller IP Core
- USB 3.0 PCIe 2.0 SATA 3.0 Combo PHY IP, Silicon proven in TSMC 22ULP
- USB 3.0 PCIe 2.0 SATA 3.0 Combo PHY IP, Silicon proven in TSMC 16FF+
- USB Type-C 40 Gb/s Multi-Protocol Switch and Bi-Directional Bit-Level Retimer